In general, an integrated circuit (IC) refers to an electrical circuit contained on a single monolithic chip containing active and passive circuit elements. As should be well understood in this art, ICs are fabricated by diffusing and depositing successive layers of various materials in a preselected pattern on a substrate. The materials can include semiconductive materials such as silicon, conductive materials such as metals, and low dielectric materials such as silicon dioxide. The semiconductive materials contained in IC chips are used to form such conventional circuit elements as resistors, capacitors, diodes and transistors.
ICs are used in great quantities in electronic devices such as digital computers because of their small size, low power consumption and high reliability. The complexity of various ICs ranges from simple logic gates and memory units to large arrays capable of complete video, audio and print data processing. As the semiconductor industry strives to meet technological demands for faster and more efficient circuits, IC chips and assemblies are created with reduced dimensions, higher operating speeds and reduced energy requirements. As IC signal speeds increase, timing errors and pulse width deviations within such signals may constitute a greater portion of a signal period that the signal itself.
Timing fluctuations in integrated circuits are generally referred to as “jitter”. Jitter can be broadly defined in certain interpretations as the variation of a signal edge from its ideal position in time, and can be an important performance measure for integrated circuit signals, including serial links and clock signals. For serial link qualification, jitter is decomposed into its various components, which may be divided into three types: random jitter (RJ), data-dependent jitter (DDJ) and periodic jitter (PJ). Each of these components is correlated with physical sources and impact bit error rate (BER) differently. Random jitter is typically due to device noise sources, e.g., thermal and flicker noise, and is assumed to be unbounded with Gaussian distribution. The combination of DDJ and PJ are bounded and can be traced back to deterministic sources such as transmission path bandwidth limitations and cross-coupling.
The continued demand for GHz processors and high-capacity communications system has resulted in an increasing number of low-cost high volume ICs clocked at GHz rates and beyond and/or equipped with multi-Gb/s serial interfaces. Circuits achieving such clock and/or data rates are characterized by very stringent timing specifications, often dictated by governing standards. Many of these standards specify maximum limits on jitter components for the transmitter (jitter generation) and minimum tolerable limits for the receiver (jitter tolerance). One major purpose of specifying limits on jitter components is to provide faster ways to estimate BER and to provide a better interoperability measure when the devices are used in a system environment.
Qualifying a transmitter requires measurement of transmitter jitter components, while receiver testing necessitates generation of data streams with controlled amounts of RJ, DDJ and PJ. As such, the need exists for features and steps to both generate jitter for receiver testing and to measure jitter for transmitter testing.